The JAMES* simulator (currently v4.0) was created in a research program at the University of Surrey in Guildford*, and models the electronic behaviour of the semiconductor crystal lattice at very small dimensions < 50 Å  (1 Å = 10^-10 meters). The model is based on a quantum physics approach, and allows the simulation to proceed at the individual carrier level, allowing  new nano-devices to be modelled and designed.

Model includes Photon interaction, B-Field, and Photon-Electron mechanisms

A single lattice unit or cell is shown opposite.

One of the new devices proposed by the research was the LNBJT (Low Noise Bipolar Junction Transistor). 

The simulator helps visualises the movement of the electrons and holes in the semiconductor lattice using attosecond science techniques.

The results of the Atomistic simulator above were validated in the recent academic paper, using a conventional Finite Element Analysis (FEA) method and published:

* Junction Atomistic Simulation of Extrinsic Semiconductors

The concept of this atomistic simulator was conceived in 1997 while working in the Research Park at the University of Surrey in Guildford. The simulator is time-independent, and works to any required time-resolution. The simulator was developed at the University of Surrey 1997-2000. The simulator time scale can be inferred from the average time of the shot-noise frequency (meaured in attoseconds), with most of the simulation events occuring in yoctoseconds (yS). The first research document (and simulator} was published through the British Library in 2002. The first device patent from the simulator was granted before publication.

INSPEC: ISBN:978-1-84919-793-9 / Conference No. 2013/004, and 

IEEE/Xplore DOI: 10.1049/ic.2013.0243 

The Study of charge transport in the semiconductor lattice, (uk.bl.ethos.436542),